The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. However, these advances have increased the complexity of processing and manufacturing ICs and, for these advances to be realized, similar developments in IC processing and manufacturing are needed. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometric size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs.
A critical condition in semiconductor manufacturing is the absence of contaminants on the wafer processing surface, since contaminants including, for example, microscopic particles may interfere with and adversely affect subsequent processing steps leading to device degradation and ultimately semiconductor wafer rejection. While the wafer cleaning process has always been a critical step in the semiconductor wafer manufacturing process, ultra-clean wafers are becoming even more critical to device integrity. For example, as semiconductor feature sizes decrease, the detrimental effect of particle contaminants increases, requiring removal of ever smaller particles. Furthermore, as the number of device layers increase, there is a corresponding increase in the number of cleaning steps and the potential for device degradation caused by particulate contaminants. To adequately meet requirements for ultra-clean wafers in ULSI and VLSI, the wafer surface needs to be essentially free of contaminating particles.
It is desired to have methods and system for cleaning wafers to reduce contaminants or particles on the wafers.